-- Memoria de testes para processador
-- mov ax,10      000001 000 00000000000000000001010
-- mov bx,30      000001 001 00000000000000000011110
-- add ax,bx      011101 000 001 00000000000000000000
-- mov cx,ax      000000 010 000 00000000000000000000
-- mov dx,10      000001 011 00000000000000000001010
-- mov ex,11      000001 100 00000000000000000001011
-- sto [dx],ax    000010 011 000 00000000000000000000
-- sto [ex],cx    000010 100 010 00000000000000000000
-- ld  fx,10      000101 101 00000000000000000001010

LIBRARY ieee;
USE ieee.std_logic_1164.ALL;
USE ieee.std_logic_unsigned.all;
use ieee.std_logic_arith.all;
USE ieee.numeric_std.ALL;
use work.definicoes_gerais.all;

entity memoria_teste is
    Port ( 
           CLK       : in STD_LOGIC;
			  MEM_WRITE : in STD_LOGIC;
			  MEM_READ  : in STD_LOGIC;
           ADDRESS   : in STD_LOGIC_VECTOR (3 downto 0);
           DADOS     : inout STD_LOGIC_VECTOR ((num_bits - 1) downto 0));
end memoria_teste;

architecture Behavioral of memoria_teste is
type ram_type is array (0 to (2**ADDRESS'length)-1) of std_logic_vector(DADOS'range);
SIGNAL RF : ram_type;
begin
	process (CLK)
	begin
		if rising_edge(CLK) then
			if MEM_WRITE = '1' then
				if ADDRESS > CONV_INTEGER(10) then
					RF(CONV_INTEGER(ADDRESS)) <= DADOS;
				end if;
			end if;
			
			if MEM_READ = '1' then
				if ADDRESS > CONV_INTEGER(10) then
					DADOS <= RF(CONV_INTEGER(ADDRESS));
				else
					case ADDRESS is
						when conv_std_logic_vector(0, ADDRESS'length) => -- mov ax,10      000001 000 00000000000000000001010
							DADOS <= "00000100000000000000000000001010";
						
						when conv_std_logic_vector(1, ADDRESS'length) => -- mov bx,30      000001 001 00000000000000000011110
							DADOS <= "00000100100000000000000000011110";
						
						when conv_std_logic_vector(2, ADDRESS'length) => -- add ax,bx      011101 000 001 00000000000000000000
							DADOS <= "01110100000100000000000000000000";
						
						when conv_std_logic_vector(3, ADDRESS'length) => -- mov cx,ax      000000 010 000 00000000000000000000
							DADOS <= "00000001000000000000000000000000";
						
						when conv_std_logic_vector(4, ADDRESS'length) => -- mov dx,10      000001 011 00000000000000000001010
							DADOS <= "00000101100000000000000000001010";
						
						when conv_std_logic_vector(5, ADDRESS'length) => -- mov ex,11      000001 100 00000000000000000001011
							DADOS <= "00000110000000000000000000001011";
						
						when conv_std_logic_vector(6, ADDRESS'length) => -- sto [dx],ax    000010 011 000 00000000000000000000
							DADOS <= "00001001100000000000000000000000";
						
						when conv_std_logic_vector(7, ADDRESS'length) => -- sto [ex],cx    000010 100 010 00000000000000000000
							DADOS <= "00001010001000000000000000000000";
						
						when conv_std_logic_vector(8, ADDRESS'length) => -- ld  fx,10      000101 101 00000000000000000001010
							DADOS <= "00010110100000000000000000001010";												
							
						when others =>
							null;
					end case;
				end if;
			end if;
		end if;
	end process;

end Behavioral;

